GDC release 0.20

[Frits van Bommel]

Thomas Kuehne wrote:
> Neither floating point nor MMX nor SSE instructions where the cause 
> but the "cpuid" feature tests.
> 
> I had to replace
> 
> 	asm{ cpuid; }
> 
> with
> 	asm{db 0x53; cpuid; db 0x5B;}

Does GDC's asm not support a more clear
	asm {push EBX; cpuid; pop EBX; }
?

Or for that matter, doesn't it know what registers are changed by 
instructions so it can save the ones it needs to preserve (DMD does that 
IIRC)?
(Or if it isn't sure, doesn't it at least make sure they get pushed & 
popped as a precaution?)