[Issue 7413] Vector literals don't work

d-bugmail at puremagic.com d-bugmail at puremagic.com
Tue Jan 31 17:27:59 PST 2012


http://d.puremagic.com/issues/show_bug.cgi?id=7413



--- Comment #1 from Manu <turkeyman at gmail.com> 2012-01-31 17:27:58 PST ---
There's a bunch of other handy immediates too:

-1 = cmpeq(anyReg, anyReg)
 - 1 opcode, always better than a load

1,3,7,15,etc can be generated by shifting -1 right by some immediate
 - 2 opcodes, pc-relative load might be better, depends on pipeline

2,4,8,16,etc can be generated by shifting 1 left
 - 3 opcodes, pc-relative load is probably better, depends on pipeline

1.0f (0x3f800000) can be generated by shifting -1 right 25 bits, then left 23
bits
 - 3 opcodes, pc-relative load is probably better, depends on pipeline

etc...

Just something to be aware of

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