[Issue 10226] core.simd bad codegen

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http://d.puremagic.com/issues/show_bug.cgi?id=10226



--- Comment #4 from Manu <turkeyman at gmail.com> 2013-06-03 08:42:51 PDT ---
(In reply to comment #3)
> (In reply to comment #2)
> > (In reply to comment #1)
> > > Small correction, ideal assembly should look like this:
> > > 
> > > 1 mov         rax,qword ptr [rbp-68h]  
> > > 2 movaps      xmm0,xmmword ptr [rax]  
> > > 5 addps       xmm0,xmm0
> > > 9 movaps      xmmword ptr [rax],xmm0 
> > > 
> > > Instruction 5 should use a xmm register as well and not add from memory.
> > 
> > Interesting. I haven't scrutinised DMD's codegen as much as GDC yet.
> > I've been working on the std.simd API mostly against GDC, and once I'm happy
> > with that, I'll be logging codegen bugs in DMD accordingly.
> > 
> > What do you get if you do:
> > 
> >     float4 result = [1,2,3,4];
> >     result = __simd(XMM.ADDPS, result, result);
> >     writefln("%s", result.array);
> > 
> > Why do you need to issue the loads and stores explicitly?
> 
> On modern processors unaligned loads come at almost no penalty, and it is a lot
> easier to use unaligned loads within a highly optimized functions compared to
> making all the data in the whole project 16 byte aligned and use aligned loads.

Umm, What?
This has nothing to do with alignment... where did that come from?
Your issue is the codegen right? You expect the codegen to be what you pasted
below, and I agree. I'm suggesting you remove the explicit load/store and let
the compiler generate them. What do you get using the code I suggest?

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