[Issue 10226] core.simd bad codegen

[d-bugmail at puremagic.com]

http://d.puremagic.com/issues/show_bug.cgi?id=10226



--- Comment #7 from Manu <turkeyman at gmail.com> 2013-06-03 16:21:54 PDT ---
(In reply to comment #6)
> Reducing alignment on all allocations to 8 byte is not a good idea. When I said
> recent processors I meant i7 ivy bridge. On older processors this still has a
> significant performance impact. Initially the manual load and store operation
> were unaligned, but as of this bug
> http://d.puremagic.com/issues/show_bug.cgi?id=10225
> I had to replace them with aligned loads and stores for the time beeing. But
> this doesn't help that when the unaligned store gets fixed, the generated code
> will be equally bad as when using aligned operations.

Okay, I see. It occurred to me that maybe DMD promoted that movups in your
other bug to a movaps because it was able to detect that the source was always
aligned? (I have no hard reason to believe that, but just a thought. Walter?)

Yeah it looks kinda like the compiler is treating the mov*ps opcodes like a
typical add or something, and the compiler is generating typical register
allocation around the opcodes which performs explicit register allocation ;)
My guess is the compiler doesn't actually understand what the mov*ps (and
friends) opcodes do, and therefore erroneously tries to helpfully configure a
register state to execute them ;)

What flags are you building with? If it's building un-optimised or in some
debug mode, the extra mov's could be to try and keep stack synchronisation.

-- 
Configure issuemail: http://d.puremagic.com/issues/userprefs.cgi?tab=email
------- You are receiving this mail because: -------