CT Information about target CPU and Related cross-compile

[Johan Engelen via digitalmars-d-ldc]

On Saturday, 26 December 2015 at 20:47:39 UTC, Ilya Yaroshenko 
wrote:
> Hi all,
>
> I will write std.blas and it will be heavily optimised for LDC.

jay! :-)

> Can these features be added to LDC?
>
> 1. Basic compile time information about target CPU such as 
> L1/L2/L3 cache sizes and available instructions set, e.g. SSE2, 
> AVX, AVX2, AVX512.

Do you have a proposal for a set of function names / version IDs 
/ ...? This sounds like a simple thing to add.
I'm not sure about cache sizes: is it currently possible to 
specify the target microarchitecture on the cmdline?

> 2. Related cross-compile. For example: target is x86_64; AVX 
> support can be checked at runtime using core.cpuid; so I want 
> to force LDC to compile three versions of BLAS for SSE, AVX and 
> AVX512, and choose better in runtime.

Something like this?
https://gcc.gnu.org/wiki/FunctionMultiVersioning