Android/ARM codegen

[Dan Olson via digitalmars-d-ldc]

"Joakim" <dlang at joakim.fea.st> writes:

> Alright, I've been stepping through some failing tests: one that seems
> to be bad codegen is that many calls to std.algorithm.iteration.map
> seem to fail, for example, when running the tests for std.zip.  One of
> the std.zip tests calls std.random.uniform, which then gets its second
> parameter stomped by map from rndGen().

Joakim, I have a hunch.  Can you try changing your abi-android.cpp so
passByVal() returns false always?  That is the only difference in our
generated IR and in my experience byval causes incorrect code on ARM.

As an experiment, I changed my passByVal() back to return true for
Tstruct (the LDC default), and then my IR is identical to yours and my
ARM code, though slightly different, also is clobbering a saved reg on
the stack.

Anyway, I pasted my GOOD assembly below yours for comparison.

> which gets translated to the following ARM assembly:
>
> _D3std9algorithm9iteration47__T3mapS363std6random6rndGenFNcNdNfZ9__lambda4Z42__T3mapTS3std5range13__T6RepeatTiZ6RepeatZ3mapMFNaNbNiNfS3std5range13__T6RepeatTiZ6RepeatZS3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult:
>         .fnstart
> .Leh_func_begin94:
>         .pad    #8
>         sub     sp, sp, #8
>         .save   {r4, lr}
>         push    {r4, lr}
>         .pad    #8
>         sub     sp, sp, #8
>         mov     r4, r0
>         mov     r0, #0
>         str     r2, [sp, #20]
>         stmib   sp, {r0, r1}
>         add     r0, sp, #4
>         ldr     r1, [sp, #20]
>         bl
> _D3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult6__ctorMFNaNbNcNiNfS3std5range13__T6RepeatTiZ6RepeatZS3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult(PLT)
>         ldmib   sp, {r0, r1}
>         stm     r4, {r0, r1}
>         add     sp, sp, #8
>         pop     {r4, lr}
>         add     sp, sp, #8
>         bx      lr

Better assembly produced with -output-s -w -d -mtriple=armv7-apple-ios
-relocation-model=pic -O3 -release -unittest -disable-inlining (needed
to match up with your change).  It is similar but uses stm (e.g stmia)
instead of stmib.

__D3std9algorithm9iteration47__T3mapS363std6random6rndGenFNcNdNfZ9__lambda4Z42__T3mapTS3std5range13__T6RepeatTiZ6RepeatZ3mapMFNaNbNiNfS3std5range13__T6RepeatTiZ6RepeatZS3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult:
	push	{r4, r7, lr}
	add	r7, sp, #4
	sub	sp, sp, #8
	mov	r4, r0
	mov	r0, #0
	stm	sp, {r0, r1}
	mov	r0, sp
	mov	r1, r2
	bl	__D3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult6__ctorMFNaNbNcNiNfS3std5range13__T6RepeatTiZ6RepeatZS3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult
	ldm	sp, {r0, r1}
	strd	r0, r1, [r4]
	sub	sp, r7, #4
	pop	{r4, r7, pc}

I wanted to use your triple with OS of android, but std/random.d needs
Android specific D code from elsewhere, so compile failed.

As aside, with inlining enabled, that function shrinks to 3 instructions:

__D3std9algorithm9iteration47__T3mapS363std6random6rndGenFNcNdNfZ9__lambda4Z42__T3mapTS3std5range13__T6RepeatTiZ6RepeatZ3mapMFNaNbNiNfS3std5range13__T6RepeatTiZ6RepeatZS3std9algorithm9iteration87__T9MapResultS363std6random6rndGenFNcNdNfZ9__lambda4TS3std5range13__T6RepeatTiZ6RepeatZ9MapResult:
	mov	r3, r1
	strd	r2, r3, [r0]
	bx	lr

Hope it helps