CT Information about target CPU and Related cross-compile

[Johan Engelen via digitalmars-d-ldc]

On Saturday, 26 December 2015 at 20:47:39 UTC, Ilya Yaroshenko 
wrote:
> Hi all,
>
> I will write std.blas and it will be heavily optimised for LDC. 
> Can these features be added to LDC?
>
> 1. Basic compile time information about target CPU such as 
> L1/L2/L3 cache sizes and available instructions set, e.g. SSE2, 
> AVX, AVX2, AVX512.

I looked a little more into adding this to LDC. LLVM seems to 
support it nicely, so it should be straightforward to get basic 
functionality that you can test and play with.

Adding a "__target()" interface would be a big front-end 
addition, I think.
How about using existing interfaces? To me it seems it is easiest 
to add extra __traits(...), which has an easily extendable 
interface.   Is there another pre-existing interface that could 
be used?

e.g.:   enum sse4 = __traits(targetHasFeature, "sse4");

Possible __traits(targetXXX) that I can think of:
- targetArch ("aarch64", "x86", "x86_64",...)
- targetOS ("Linux", "Win32",...)
- targetFeatures,  returning tuple of feature strings
- targetCPU

What do you think?