RISC-V port

David Nadlinger code at klickverbot.at
Sun May 20 17:32:53 UTC 2018

Hi Luís,

On 17 May 2018, at 16:36, Luís Marques via digitalmars-d-ldc wrote:
> Does anyone here understand what an LLVM backend needs to do to get 
> code generated for the exception stuff (e.g. landingpad, etc.)? I 
> tried to look in the ARM backend but it wasn't very illuminating...

I'm not sure there is a single answer to this question, as it is rather 
broad in scope.

First of all, what is the exception ABI for your target? Is it 
table-based using DWARF frame information? Or is it {set,long}jmp-based?

I don't quite remember whether this question has even been addressed for 
RISC-V so far, that is, whether there even is a compiler port that 
supports C++ exceptions, or an ABI document that prescribes a particular 
implementation. If there is none and you want to play around with an 
initial implementation of *something*, I'd probably choose the vanilla 
DWARF-based implementation as supported by libunwind.

 From there, it's a matter of setting the ExceptionType correctly in 
your MCAsmInfo subclass, and fixing up various other bits and pieces as 
required. (For example, the code generator might need some tweaks to 
make sure the frame offset information is up to date, etc.) Grepping 
lib/Backend for `DwarfCFI` should provide you with some inspiration.


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