Bytes with 128 bits?

[Manfred Nowak]

Don Clugston wrote

> RAM -> L2 cache -> L1 cache -> CPU

Seems not to be true shortly. Instead:

RAM -> L1 --------------|
       | -> L2----------|       
             |-> L3 -> CPU

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2939&p=9


> But normally you try to stay in the L1 cache, so it doesn't matter.

Trying to stay in the L1 cache at least needs information about how big 
the L1 cache is. Where can this information be entered?

-manfred