Simple makefile problem - implicit rule

Ali Çehreli acehreli at yahoo.com
Wed Jan 9 10:15:29 PST 2013


On 01/09/2013 09:51 AM, deed wrote:
> # makefile -----------
>
> OBJS = main.obj othermodule.obj
> DC = dmd
> DCFLAGS = -c
>
> all : $(OBJS)
>
> %.obj : %.d
> $(DC) $< $(DCFLAGS)
>
> # --------------------
>
> Error on line 9: expecting target : dependencies
>
> * main.d, othermodule.d and makefile are in the same folder.
> * make is executed in this folder from the command line
>
> Anyone cares to explain what's wrong/missing?

Assuming that this is for GNU make, ensuring that the rule starts with a 
tab characters, that file works with GNU Make 3.81.

Ali


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