[OT] Re: howto count lines - fast

[Russel Winder via Digitalmars-d-learn]

On Wed, 2017-05-31 at 16:37 -0700, H. S. Teoh via Digitalmars-d-learn
wrote:
> […]
> 
> An even more down-to-earth counterargument is that if CPU vendors had
> been content with understandable, simple CPU implementations, and
> eschewed "heroic", hard-to-understand things like instruction
> pipelines
> and cache hierarchies, we'd still be stuck with 16 MHz CPU's in 2017.
> 

The people looking at modern, ultra-parallel hardware architectures are
indeed looking to use very simple CPU with ultra-low power use. Just
because Moore Law, the demand for computation, etc, during the 1980s,
1990s and 2000s led to x86_64 with its "heroic" silicon wafer layout,
doesn't mean that is where we have to stay. That's legacy thinking
based on huge investments of capital and requirement of a company to
continue to force an income stream from it's customers. The current
state of mainstream hardware is all about not innovating. 

The problem with supercomputing just at the moment, is that you have to
build a power station for each one. The x86_64 and GPGPU approach
hasn't hit the end of Moore's Law, it's hit the "we can't supply enough
power to run it" wall. The Cloud is also not the answer, it's just and
income stream for a couple of companies pretending to continue to
innovate.
  
-- 
Russel.
=============================================================================
Dr Russel Winder      t: +44 20 7585 2200   voip: sip:russel.winder at ekiga.net
41 Buckmaster Road    m: +44 7770 465 077   xmpp: russel at winder.org.uk
London SW11 1EN, UK   w: www.russel.org.uk  skype: russel_winder
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