"The total size of a static array cannot exceed 16Mb."

[BCS]

Reply to Vladimir,

> On Wed, 03 Oct 2007 00:51:46 +0300, BCS <ao at pathlink.com> wrote:
> 
>> Unless I'm smoking something, the code to access any array will look
>> the same regardless of where the array is.
>> 
> Well, with how I understand this terminology, "dereferencing" means
> reading an offset from a memory location, other than an immediate
> instruction operand. Consider:
> 
[...]

I think we are referring to the same thing, but counting different parts 
of it. What I'm counting is the times that a load is done from an address 
that is not an inline value, but comes from a register.

> readValue proc near
> mov     eax, ds:bigArr[eax*4]

If I'm reading this correctly what is happening here is "load address (bigArr 
+ eax*4)

unless IA32 has a special case op for that, your going to have to compute 
the address in another op and even if there is a special case, I rather suspect 
that it will be exactly as fast either way. Furthermore, if more than one 
detention is used you will have to do the computation in other ops no mater 
what.

> retn
> readValue endp

BTW where did you get that ASM dump? I don't recognize the format.

> 
> readValue proc near
> mov     ecx, ds:bigArr
> mov     eax, [ecx+eax*4]
> retn
> readValue endp
> It gets worse if there are further nests, e.g. when using
> multidimensional arrays.

unless you are nesting dynamic arrays it's just math, not dereferences (i1 
+ d1*i2 + d2*d1*i3 ...)


But it looks like we agree on that point.

> 3) rectangular static arrays are much faster when you want to access
> it by column - you just add (width*element_size) to the pointer, and
> go to the element on the next row

this can be done with a dynamic array of static sized arrays.

> 
> 4) when you want to access an address inside the element (you have an
> array of structs), you must perform an addition after the
> multiplication (I think it can be part of the instruction in the newer
> instruction sets though) - while, when the array base address is
> predetermined, you can just use base_address + element_offset as the
> base address, then add index*element_size to that

It looks like you are using a (constA + Constb * reg) address mode. I just 
look in the "Intel Architecture Software Developer's Manual" and didn't find 
any reference to it. Am I missing something? (I didn't actual look real hard)

> 
> etc.
>