Multicores and Publication Safety

[Brad Roberts]

Jb wrote:
> "Walter Bright" <newshound1 at digitalmars.com> wrote in message 
> news:g7855a$2sd3$1 at digitalmars.com...
>> "What memory fences are useful for on multiprocessors; and why you should 
>> care, even if you're not an assembly programmer."
>>
>> http://bartoszmilewski.wordpress.com/2008/08/04/multicores-and-publication-safety/
>>
>> http://www.reddit.com/comments/6uuqc/multicores_and_publication_safety/
> 
> None of that is relevant on x86 as far as I understand. I could only find 
> the one regarding x86-64, but as far as I know it's the same on x86-32.
> 
> http://www.intel.com/products/processor/manuals/318147.pdf
> 
> The key point being loads are not reordered with other loads, and stores are 
> not reordered with other stores.
> 

Pay very close attention to sections 2.3 and 2.4 of that document.