Wish: Variable Not Used Warning

Markus Koskimies markus at reaaliaika.net
Thu Jul 10 22:14:57 PDT 2008


On Thu, 10 Jul 2008 21:53:49 -0700, Brad Roberts wrote:

>> Certainly nothing to do with HLLs like D. Absolutely nothing.
>
> Why is it that so many people here seem to have some sort of weird
> blinders that turn the world into black and white with no shades of
> grey?  The world just doesn't work like that.  Sorry to burst your
> bubble.

Be my guest.

> Additionally, your last sentence makes me think you're either being
> willfully blind or just stubborn.

Probably both.

> Every modern x86 shares a cache line size these days.. 64 bytes.  That
> one optimization alone can double the performance of a system that's
> hitting cache line contention.

There is a thing called align. If you don't mind about cache indexes, but 
just one to make things to appear in separate lanes, use align.

But that really does not have any effect to _regular_ multi-way caches.


> An awful lot of people aren't even aware
> this sort of thing can occur.

For decades, PC processor manufacturers are optimized their processors 
for software, not in the other way. That is why the processors execute 
functions so quickly, that is the sole reasons for having caches (the 
regular locality of software, e.g. the IBM study from 60's).

> Are you suggesting that it's not
> something programmers should be aware of?

Yes, I am.

> You're 'absolutely nothing' comment is wrong.  Every one of the examples
> in that presentation are in C, and demonstrate quite clearly its
> effects.  Can you do even better by going lower level, sure, but doesn't
> make it worthless or nothing.

Certainly, if you make lowlevel optimizations, it pays back somehow. But 
only in the architectures you are doing it. Not a HLL thing IMO.

And all the time I'm optimizing cache usage for specified architecture, I 
use alignments (to cache line sizes) and linker (not to put two regularly 
referenced things to same index).



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