Determing cache sizes -- request for testing

[Julio César Carrascal Urquijo]

Hello Don,

> Please compile and run the code, and report the results. Any results
> would be useful, but particularly valuable would be:
> (1) Multicore AMD machines;
> (2) Early AMD machines (K6 or earlier).
> (3) Early Intel machines;
> (4) anything from another manufacturer.
> (5) any crashes or obvious bugs.
> Public domain.
> 

Vendor string:    AuthenticAMD
Processor string: AMD Athlon(tm) 64 X2 Dual-Core Processor TK-55
Signature:        Family=15 Model=104 Stepping=1
Features:         MMX FXSR SSE SSE2 SSE3 3DNow! 3DNow!+ MMX+ AMD64 HTT
Multithreading:   2 threads / 2 cores

Family=F Model=8 Stepping=1
Data caches:
Level 1 size=8K, ways=2 linesize=32
Level 2 size=256K, ways=16 linesize=0
Level 3 size=4194303K, ways=1 linesize=0


The same data is reported by CPU-Z.