D vs C++

Caligo iteronvexor at gmail.com
Fri Dec 24 22:54:07 PST 2010


On Sat, Dec 25, 2010 at 12:21 AM, bearophile <bearophileHUGS at lycos.com>wrote:

> Caligo:
>
>
> > Here are the measurements (average of 3 runs):
>
> Your timings lack information about the CPU, compilation switches used, and
> C++ compiler version used.
> Are those really averages?
>
>
> I used gcc version 4.4.4 to compile my C++ code.  The only switch to
optimize that I used is '-O2'.  Same for GDC, but GDC was compiled with gcc
4.4.5. And yes, those are averages. For DMD I used 'dmd -release count.d' to
compile.

And here is my CPU info:
processor       : 0
vendor_id       : AuthenticAMD
cpu family      : 15
model           : 67
model name      : AMD Athlon(tm) 64 X2 Dual Core Processor 6400+
stepping        : 3
cpu MHz         : 3214.495
cache size      : 1024 KB
physical id     : 0
siblings        : 2
core id         : 0
cpu cores       : 2
apicid          : 0
initial apicid  : 0
fpu             : yes
fpu_exception   : yes
cpuid level     : 1
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt
rdtscp lm 3dnowext 3dnow rep_good extd_apicid pni cx16 lahf_lm cmp_legacy
svm extapic cr8_legacy
bogomips        : 6428.99
TLB size        : 1024 4K
pages

clflush size    :
64

cache_alignment :
64

address sizes   : 40 bits physical, 48 bits
virtual

power management: ts fid vid ttp tm
stc



processor       :
1

vendor_id       :
AuthenticAMD

cpu family      :
15

model           :
67

model name      : AMD Athlon(tm) 64 X2 Dual Core Processor 6400+
stepping        : 3
cpu MHz         : 3214.495
cache size      : 1024 KB
physical id     : 0
siblings        : 2
core id         : 1
cpu cores       : 2
apicid          : 1
initial apicid  : 1
fpu             : yes
fpu_exception   : yes
cpuid level     : 1
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt
rdtscp lm 3dnowext 3dnow rep_good extd_apicid pni cx16 lahf_lm cmp_legacy
svm extapic cr8_legacy
bogomips        : 6429.30
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc
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