Intel Single-chip Cluster

[Andrei Alexandrescu]

bearophile wrote:
> Found this through Reddit, it's a short article, but it's to the point:
> http://www.linux-mag.com/id/7762
> 
> Inside that article there is a link to a little paper:
> http://techresearch.intel.com/UserFiles/en-us/File/terascale/ISSCC-paper.pdf
> 
> Probably future true commercial Intel CPUs will be different from this one, and they can be less extreme (for example they can be hybrid, with few fast cores for single threaded code too), but this CPU shows a trend that can't be ignored.
> 
> It contains 24 dual cores, each core has 256 KB of L2 cache (10 clocks latency) that is rather small, plus the usual 16+16 L1. This CPU prototype is at 1 GHz.
> 
> Each core is in-order, as the Atom CPU, instead of being out-of-order like a Core Duo. This saves a very large number of transistors and energy power, but forces the usage of refined compilers that are able to perform a good instruction scheduling. Otherwise performance are awful (as on Atom). I think currently compilers like LLVM for static languages are better at instruction scheduling that the Java HotSpot. But a fitter HotSpot can be designed (or they have already designed it, I don't know how well Java runs on Atom CPUs today).
> 
> Each pair of cores also has 16 KB of memory used for message passing among pairs of cores. Plus there are connections to external memory. I don't exactly know how L2 cache is managed, but each of 48 cores run a single Linux, because there is no global cache coherence. I don't know about its RAM coherence or how it manages the RAM. I don't know if the RAM is shared.
> 
> The memory used for message passing is managed with a lent/unique strategy, there is only an owner of a datum.
> 
> This CPU looks perfect for the Chapel language, that natively supports the idea of CPU local data plus very refined ways to share it. D design is nowhere this good on such things. But as I have said this is mostly a prototype, so future commercial Intel CPUs can be less extreme.
> 
> I think higher level languages that use a lot message passing as Erlang too can be adapted to run quite well on this CPU.
> 
> The future will be interesting.
> 
> Bye,
> bearophile

Mmmm... message passing.

Andrei