SIMD support...

[Artur Skawina]

On 01/06/12 20:53, Manu wrote:
> What about GCC? Will/does it support arbitrary alignment?

For sane "arbitrary" values (ie powers of two) it looks like this:

--------------------------------
import std.stdio;
struct S { align(65536) ubyte[64] bs; alias bs this; }

pragma(attribute, noinline) void f(ref S s) { s[2] = 42; }

void main(string[] argv) {
  S s = void;
  f(s);
  writeln(s.ptr);
}
---------------------------------

turns into:

---------------------------------
 804ae40:       55                      push   %ebp
 804ae41:       89 e5                   mov    %esp,%ebp
 804ae43:       66 bc 00 00             mov    $0x0,%sp
 804ae47:       81 ec 00 00 01 00       sub    $0x10000,%esp
 804ae4d:       89 e0                   mov    %esp,%eax
 804ae4f:       e8 2c 0e 00 00          call   804bc80 <void align.f(ref align.S)>
 804ae54:       89 e0                   mov    %esp,%eax
 804ae56:       e8 c5 ff ff ff          call   804ae20 <void std.stdio.writeln!(ubyte*).writeln(ubyte*).2084>
 804ae5b:       31 c0                   xor    %eax,%eax
 804ae5d:       c9                      leave  
 804ae5e:       c3                      ret    
 804ae5f:       90                      nop
---------------------------------

specifying a more sane alignment of 64 gives:

---------------------------------
0804ae40 <_Dmain>:
 804ae40:       55                      push   %ebp
 804ae41:       89 e5                   mov    %esp,%ebp
 804ae43:       83 e4 c0                and    $0xffffffc0,%esp
 804ae46:       83 ec 40                sub    $0x40,%esp
 804ae49:       89 e0                   mov    %esp,%eax
 804ae4b:       e8 30 0e 00 00          call   804bc80 <void align.f(ref align.S)>
 804ae50:       89 e0                   mov    %esp,%eax
 804ae52:       e8 c9 ff ff ff          call   804ae20 <void std.stdio.writeln!(ubyte*).writeln(ubyte*).2084>
 804ae57:       31 c0                   xor    %eax,%eax
 804ae59:       c9                      leave  
 804ae5a:       c3                      ret    
---------------------------------