SIMD support...

[Sean Cavanaugh]

On 1/6/2012 9:44 AM, Manu wrote:
> On 6 January 2012 17:01, Russel Winder <russel at russel.org.uk
> <mailto:russel at russel.org.uk>> wrote:
> As said, I think these questions are way outside the scope of SIMD
> vector libraries ;)
> Although this is a fundamental piece of the puzzle, since GPGPU is no
> use without SIMD type expression... but I think everything we've
> discussed here so far will map perfectly to GPGPU.

I don't think you are in any danger as the GPGPU instructions are more 
flexible than the CPU SIMD counterparts GPU hardware natively works with 
float2, float3 extremely well.  GPUs have VLIW instructions that can 
effectively add a huge number of instruction modifiers to their 
instructions (things like built in saturates of 0..1 range on variable 
arguments _reads_, arbitrary swizzle on read and write, write masks that 
leave partial data untouched etc, all in one clock).

The CPU SIMD stuff is simplistic by comparions.  A good bang for the 
buck would be to have some basic set of operators (* / + - < > == != <= 
 >= and especially ? (the ternary operator)), and versions of 'any' and 
'all' from HLSL for dynamic branching, that can work at the very least 
for integer, float, and double types.

Bit shifting is useful (esp manipulating floats for transcendental 
functions or workingw ith half FP16 types requires a lot of), but should 
be restricted to integer types.  Having dedicated signed and unsigned 
right shifts would be pretty nice to (since about 95% of my right shifts 
end up needing to be of the zero-extended variety even though I had to 
cast to 'vector integers')