ARM bare-metal programming in D (cont) - volatile

[Russel Winder]

On Sat, 2013-10-26 at 16:48 +0200, eles wrote:
[…]
> OOH you show me it is not a big deal, OTOH you make a big deal 
> from it refusing every support inside the compiler or the 
> standard library.

I am assuming that the C++ memory model and it's definition of volatile
has in some way made the problem go away and expressions such as:

	device->csw.ready

can be constructed such that there is no caching of values and the
entity is always read. Given the issues of out of order execution,
compiler optimization and multicore, what is their solution?

(The above is a genuine question rather than a troll. Last time I was
writing UNIX device drivers seriously was 30+ years ago, in C, and the
last embedded systems work was 10 years ago using C with specialist
compilers – 8051, AVR chips and the like. I would love to be able to
work with the GPIO on a Raspberry Pi with D, it would get me back into
all that fun stuff. I am staying away as it looks like a return to C is
the only viable just now, unless I learn C++ again.)

> Should I one day define my own "int plus(int a, int b) { return 
> a+b; }"?

Surely, 

	a + b

always transforms to 

	a.__add__(b)

in all quality languages (*) so that you can redefine the meaning from
the default.


(*) which rules out Java.

-- 
Russel.
=============================================================================
Dr Russel Winder      t: +44 20 7585 2200   voip: sip:russel.winder at ekiga.net
41 Buckmaster Road    m: +44 7770 465 077   xmpp: russel at winder.org.uk
London SW11 1EN, UK   w: www.russel.org.uk  skype: russel_winder