What would be the consequence of implementing interfaces as fat pointers ?

Ola Fosheim Grøstad" <ola.fosheim.grostad+dlang at gmail.com> Ola Fosheim Grøstad" <ola.fosheim.grostad+dlang at gmail.com>
Wed Apr 2 03:21:49 PDT 2014


On Tuesday, 1 April 2014 at 23:05:55 UTC, dajones wrote:
> x86 uses something called (IIRC) a "store forwarding buffer". 
> Essentialy it
> keeps track of stores untill they have been completed. Any time 
> you read
> from an address the store forwrding buffer is checked first, 
> then caches and main memory.

Store forwarding is probably important for passing parameters on 
the stack (where you have frequent subsequent writes/reads to the 
same memory location), but optimizing for it seems like very CPU 
dependent PITA and you are usually better off using SIMD 
registers IMO. After all store forwarding is only relevant until 
the store hits the L1 cache of the core.

> either way memory stores/loads generaly have at best a 3 cycle 
> latency.

Because the CPU has to check the dirty flag of the L3 cacheline 
in case another core have a dirty L1 from a store to the same 
memory?


More information about the Digitalmars-d mailing list