Testing some singleton implementations

Stanislav Blinov stanislav.blinov at gmail.com
Fri Feb 7 09:10:06 PST 2014


On Friday, 7 February 2014 at 16:57:50 UTC, Sean Kelly wrote:
> On Friday, 7 February 2014 at 16:36:03 UTC, Stanislav Blinov 
> wrote:
>>
>> No barriers in sight.
>
> Awesome.  Then I think we can go back to the old logic.

Cool. Also, from 
http://en.cppreference.com/w/cpp/atomic/memory_order:

--8<--

On strongly-ordered systems (x86, SPARC, IBM mainframe), 
release-acquire ordering is automatic for the majority of 
operations. No additional CPU instructions are issued for this 
synchronization mode, only certain compiler optimizations are 
affected (e.g. the compiler is prohibited from moving non-atomic 
stores past the atomic store-release or perform non-atomic loads 
earlier than the atomic load-acquire)

-->8--


More information about the Digitalmars-d mailing list