assume, assert, enforce, @safe

Timon Gehr via Digitalmars-d digitalmars-d at puremagic.com
Thu Jul 31 14:09:22 PDT 2014


On 07/31/2014 09:54 PM, Jonathan M Davis wrote:
> On Thursday, 31 July 2014 at 19:11:55 UTC, Timon Gehr wrote:
>> On 07/31/2014 09:03 PM, Walter Bright wrote:
>>> It means if the control flow does actually get there, a HALT is
>>> executed.
>>>
>>
>> And assuming control flow does not actually get there?
>
> Then the HALT instruction is never hit.

Indeed. Now note that the compiler is arguing from the same standpoint 
that you were just now.

> The compiler would have to be
> able to prove that reaching the HALT instruction was impossible in order
> to remove it

The compiler is able to prove this immediately. The goal it needs to 
prove ('control flow does not reach assert(0)') is an assumption made by 
Walter and the language specification and readily available.

Note that I'd be happier with the state of affairs if you were right 
about this.


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