H1 2015 Priorities and Bare-Metal Programming

[Johannes Pfau via Digitalmars-d]

Am Mon, 02 Feb 2015 02:57:28 -0800
schrieb Walter Bright <newshound2 at digitalmars.com>:

> On 2/2/2015 1:39 AM, Johannes Pfau wrote:
> > No, it doesn't even come close.
> >
> > * Ports.B += 7 doesn't work.
> 
> This should not be done with MMIO because the read and write cycles
> generated are ill-defined and vary based on obscure backend details.
> 

Operator overloading? If +=7 is implemented as a
volatileLoad + modify  volatileStore as wrapper would your whole point
is void.

> 
> > In order to implement it you need a
> >    Volatile!ubyte wrapper, return by ref and avoid some compiler
> > bugs
> 
> What compiler bugs?
> 
> 
> > * You do need force-inline to produce halfway decent code
> 
> Nope. volatileLoad() and volatileStore() do not produce function
> calls.
> 

This was a reply to your example. Your example used a function which
wrapped volatileLoad:

>>> static ubyte B() { return volatileLoad(cast(ubyte *)0x0025); }

I think it's obvious were a force-inline would go.

> 
> > * You also need to enable backend optimization to produce decent
> > code
> 
> Not any more true than with volatile types, because the compiler
> intrinsic actually translates to a volatile type, not a function call.
>

I've explained that in detail:
https://forum.dlang.org/post/manfpc$2v0u$1@digitalmars.com
I'm not going to explain it again. Also your focus on intrinsics is
wrong, I'm not talking about the intrinsics I'm talking about
wrappers.

> 
> You are making a lot of assumptions that volatileLoad() and
> volatileStore() do not work. Please try it, examine the generated
> code, and see.
> 

Nice ad hominem.

I've implemented volatileLoad/store for GDC long before you implemented
it in DMD. I've written a Volatile!T wrapper, a Register wrapper and a
tool which scrapes datasheets for Register definitions and automatically
generates Register definitions. I've also fixed GDC for 8bit AVR
processors and run and tested D code with volatileLoad/Store on these
processors. Three months ago.
I'm not making any assumptions about how volatileLoad/Store work, I
know it quite well. Again the problem is not volatileLoad/Store which
translate to single instructions it's wrappers. All the points I made
come from experience implementing and using these wrappers.

I don't see any point continuing this discussion as long as you don't
take me seriously. At least you could read my replies properly.