A very interesting slide deck comparing sync and async IO

Shachar Shemesh via Digitalmars-d digitalmars-d at puremagic.com
Sun Mar 6 05:21:41 PST 2016


For switching between threads, this seems wrong.

On 04/03/16 20:29, deadalnix wrote:

> The minimal cost of a context switch is one TLB miss (~300), one cache
> miss (~300)

Why do you claim the first two? Again, assuming threads of the same 
process, where the address space (minus the TLS) is the same.

> and iret (~300).

You have an iret whether you switched or not. Going into the kernel and 
coming back has that, whether we switched or not. In particular, since 
you need a system call in order to call "read", "write" and "accept", 
these are there regardless.

BTW, using one thread per client, you need less system calls, which 
reduces that particular overhead.

> But then, you usually don't do context
> switch for nothing, so some work has to be done in the context switch.
> This is where it gets very dependent on which system call you use.
>
> During its work, the system call would have evicted various cache lines
> and TLB entries to put its own data there. That means that after the
> context switch is done, part of your cache is gone, and you'll need some
> time to start again running full speed.

I'm having a hard time following the discussion thread to understand 
what you are replying to here, but surely, you made the system call 
because you needed it to be done.

> You may think that it is the
> same with a library call, and to some extent it is, but much worse: as
> kernel and userspace do not share the same address space

I hate that myth! It is such a difficult one to kill.

The kernel absolutely uses the same address space as the userspace 
(whatever user space happened to be there). That is why we had the 3/1GB 
split in the bad old 32bit days. The 1GB was a chunk of address space, 
bitten off the user space usable address space, that has the same 
mapping regardless of which user space is mapped in. This allows the 
kernel to use the same virtual addresses without loading a new TLB.

In other words, performing a system call is not a context switch.

> and access
> write,

That much is true, but it is merely a bit change in a register. It has 
no cache implications.

> so you typically get way more trashing (you can't reuse TLB
> entries at all for instance).

Like I said, not true.

As a side note, some platforms have cookies inside the TLB, so you don't 
have to flush it even when you do an actual context switch, but I'm 
guessing we're discussing Intel here.

Shachar


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