Whats holding ~100% D GUI back?

Ola Fosheim Grøstad ola.fosheim.grostad at gmail.com
Sat Nov 30 10:30:39 UTC 2019


On Friday, 29 November 2019 at 23:55:55 UTC, Ola Fosheim Grøstad 
wrote:
> On Friday, 29 November 2019 at 16:40:01 UTC, Gregor Mückl wrote:
>> This presentation is of course a simplification of what is 
>> going on in a GPU, but it gets the core idea across. AMD and 
>> nVidia do have a lot of documentation that goes into some more 
>> detail, but at some point you're going to hit a wall.
>
> I think it is a bit interesting that Intel was pushing their 
> Phi solution (many Pentium-cores), but seems to not update it 
> recently. So I wonder if they will be pushing more independent 
> GPU cores on-die (CPU-chip). It would make sense for them to 
> build one architecture that can cover many market segments.

Yep, they are, seems that Intel Xe will succeed Phi:

https://en.wikipedia.org/wiki/Intel_Xe

But probably only for special purpose and enthusiasts, so not 
very relevant for UI. One interesting point regarding UI is that 
Linux drivers for AMD APUs support zero-copying using the unified 
GPU/CPU memory:

https://en.wikipedia.org/wiki/Heterogeneous_System_Architecture#Software_support

Whereas Intel on-die GPUs seem to require copying, but it isn't 
quite clear to me if that will be faster if it is in cache or 
not... I suspect it will have to flush first.. :-/

Another interesting fact is that NVIDIA has shown interest in 
RISC-V:

https://abopen.com/news/nvidia-turns-to-risc-v-for-rc18-research-chip-io-core/



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