Fixing core.atomic
rm
rymrg at memail.com
Wed Jun 2 17:37:44 UTC 2021
On 02/06/2021 20:33, Max Haughton wrote:
> On Wednesday, 2 June 2021 at 15:30:46 UTC, Ola Fosheim Grøstad wrote:
>> On Wednesday, 2 June 2021 at 15:19:59 UTC, Ola Fosheim Grøstad wrote:
>>> On Wednesday, 2 June 2021 at 15:09:54 UTC, rm wrote:
>>>> inc/dec are implemented in terms of fetch_add.
>>>
>>> IIRC some architectures provide more efficient inc/dec atomics
>>> without fetch? I haven't looked at that in years, so I have no idea
>>> what the contemporary situation is.
>>
>> No, I think that was wrong, I think they usually return the original
>> value (or set a flag or whatever). But it doesn't matter. We should
>> just look at what the common contemporary processors provide and look
>> at instructions per clock cycles throughput. I guess last generation
>> ARM/Intel/AMD is sufficient?
>
> Are they always fixed latency? No dependence on the load store queue
> state (etc.) for example?
At least on x86-TSO, an atomic operation forces the cache to be flushed
to memory.
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