Is core.internal.atomic.atomicFetchAdd implementation really lock free?
Vladimir Panteleev
thecybershadow.lists at gmail.com
Wed Nov 30 00:11:10 UTC 2022
(Disclaimer: I have not studied lock-free programming so I might
be wrong.)
On Wednesday, 30 November 2022 at 00:04:22 UTC, mw wrote:
> ```
> lock; xadd[%0], %1;
> ```
>
> Is this really lock free?
`lock` here refers not to some mutex (which is what "lock free"
generally means), but to the processor cache line:
https://stackoverflow.com/questions/8891067/what-does-the-lock-instruction-mean-in-x86-assembly
> If not, can we use `cas` to implement it, e.g pseudo code:
>
>
> ```
> int atomicFetchAdd(int * pAddr, int nIncr ) {
>
> while (true) {
> int ncur = atomicLoad(pAddr);
> if (cas( pAddr, ncur, ncur + nIncr )
> return ncur ;
> }
>
> }
> ```
`CMPXCHG`, used to implement CAS on x86, needs LOCK as well:
https://stackoverflow.com/questions/27837731/is-x86-cmpxchg-atomic-if-so-why-does-it-need-lock
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