[dmd-concurrency] shared arrays

[Andrei Alexandrescu]

I was asking mostly about 64-bit atomic assigns (not CAS), i.e. long 
assignments. I take it we can't assume they are atomic?

Andrei

Sean Kelly wrote:
> On Jan 15, 2010, at 5:44 AM, Robert Jacques wrote:
>> From wikipedia:
>> "Early AMD64 processors lacked the CMPXCHG16B instruction, which is an extension of the CMPXCHG8B instruction present on most post-486 processors. Similar to CMPXCHG8B, CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword) data types. This is useful for parallel algorithms that use compare and swap on data larger than the size of a pointer, common in lock-free and wait-free algorithms. Without CMPXCHG16B one must use workarounds, such as a critical section or alternative lock-free approaches"
> 
> Oops, you're right.  The problem was cx16, not cx8.  Either way, dwcas isn't reliably available anywhere but x86.
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