Strange Multiple Definition Error using makefile

[LeqxLeqx]

On Friday, 28 December 2018 at 13:41:14 UTC, Iain Buclaw wrote:
> On Wed, 26 Dec 2018 at 22:25, LeqxLeqx via D.gnu 
> <d.gnu at puremagic.com> wrote:
>>
>> ===== and my simple makefile ======
>>
>>      O_FILES=myinterface.o myabstractclass.o myclass.o main.o
>>      CC=gdc
>>
>
> Ahem, CC means "C Compiler", you should be using another 
> variable name here. ;-)
>
>>
>> I'm using GDC version: `gdc (Ubuntu 8.2.0-1ubuntu2~18.04) 
>> 8.2.0'
>>
>> So ultimately, my question is: What am i doing wrong here? Any 
>> and all help is appreciated.
>
> Two object files are claiming to have the one true copy of the 
> thunk to firstMethod.
>
> Switching from separate compilation to compiling all sources in 
> one compilation command will sort that out.
>
> ---
> D_FILES=myinterface.d myabstractclass.d myclass.d myderived.d 
> main.d CC=gdc
>
> .PHONY : all
> all : test.bin
>
> test.bin: $(D_FILES)
>         $(CC) -o $@ $^
> ---
>
> There should be better spec over how thunks (particularly to 
> methods outside the compilation unit) are handled.  Maybe this 
> can be addressed before version 9 release.

Okay, I'll switch to the all-source-code way for the moment. For 
some reason, I never had a problem with this when I was using 
GDC-6, but with the newer GDC, it suddenly became a problem.

Thank you!