DCompute target: Intel to Introduce New CPU-FPGA Hybrid Chip Supported by Acceleration Stack
Ola Fosheim Grøstad
ola.fosheim.grostad+dlang at gmail.com
Sat Oct 21 11:42:16 UTC 2017
On Friday, 20 October 2017 at 20:41:24 UTC, Nordlöw wrote:
> Ever since I first tried programming in VHDL and realized that
> it, at that time, was far too unproductive for my taste, I've
> been waiting for the software and FPGA programming models to
> unite...
>
> What kinds of simplifications (over OpenCL) can and will
> DCompute offer in this regard?
I don't know. It is an interesting development, but I've got a
feeling that you have to address the hardware very specifically
to get worthwhile performance. My gut feeling is that
abstractions would be a bad idea…
So maybe this will be best suited for very narrow domains where
you can rely on third party libraries (e.g. statistical signal
processing and other fields) or narrow applications that can
afford to tune very carefully to the underlying hardware.
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