Releasing LibreCore with a libwasm/svelte-d Bios built on TempleOS

[Etienne]

https://github.com/etcimon/GSys-LibreCore/
https://github.com/etcimon/GSys-LibreCore/tree/master/g6lc_bios

I built this risc-v processor, and the full open source bios 
doubles as a wasm/js OS with TempleOS' holyC. It uses svelte-d 
for the UI/app platform which compiles to a variation of 
https://github.com/skoppe/spasm which I extended as 
https://github.com/etcimon/libwasm where within g6lc_bios you can 
try/await directly in svelte, add D code segments or tune it in D 
from the generated D svelte-engine, basically making the bios an 
OS that can be extended through libwasm web apps.

It ties together with an open source RISC-V processor that 
includes configurable systemverilog parameters to switch on OoO 
vs in-order, multi-core, multi-issue, smt2 (solid 
multi-threading), L2/L3 with eWT (write-update+read-allocate on 
write-through rather than write-back with a coherence hub), rvv, 
hypervisor, an AI island with clusters that scale to 100 TOPS+ 
(or FLOPS supported too), the sv-timing package have .sv timing 
compilers allows to tune to 3ghz+ through heuristics that bring 
down the FO4 while preserving conformity.

The BIOS as a whole runs on a simulated build of the processor in 
QEMU and the features of a browser are built into the kernel to 
run the wasm/HolyC as first-class citizen like TempleOS did with 
HolyC alone, which makes it like a web OS entirely.