[Issue 9738] inline asm offset expression looks like array indexing

[d-bugmail at puremagic.com]

http://d.puremagic.com/issues/show_bug.cgi?id=9738


David Nadlinger <code at klickverbot.at> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
                 CC|                            |code at klickverbot.at
         Resolution|WONTFIX                     |


--- Comment #2 from David Nadlinger <code at klickverbot.at> 2013-03-16 17:24:36 PDT ---
Can't we just disallow it, and force people to use 1[regs] or [regs + 1] if
they really want the byte offset behavior?

The issue is not that Martin and I are not familiar with Intel syntax. It is
that the expression is both a valid D expression and AsmBrExp, and without
reading the grammar, there is no way of knowing what this will turn out to be.

Don't forget that nobody will be able to afford writing it things like regs[1]
anyway, because others reading the code could mistake it for the obvious
alternative – the meaning that the expression has everywhere else except for
asm blocks.

D has generally fared well with preventing unexpected behavior by outright
disallowing potentially ambiguous constructs (the "if it looks like C, it
behaves like C" rule, shadowing, …). I don't see why this approach should not
apply here.

(feel free to re-close as WONTFIX if you still don't think this merits further
discussion)

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