Using SSE3 vector shuffel with LDC

[Guillaume Piolat]

On Sunday, 26 May 2019 at 16:40:58 UTC, kinke wrote:
> On Sunday, 26 May 2019 at 16:35:48 UTC, KytoDragon wrote:
>> After tinkering with ldc.llvmasm (and figuring out that the 
>> asm argument a specified in reverse order) i have got 
>> everything working. E.g.
>>
>> __m128i _mm_alignr_epi8(u8 count)(__m128i A, __m128i B) {
>>     return __asm!__m128i("palignr $3, $2, $1", "=x,0,x,i", A, 
>> B, count);
>> }
>>
>> Thank you again!
>
> Excellent. Wrt. order, yeah, LLVM uses AT&T syntax. Guillaume 
> would surely welcome an intel-intrinsics PR. :)

Absolutely, SSE3 up to SSE4.2 are on the roadmap, there were just 
a lack of people showing up with more needs.