ROR is now optimized as SHR ?
kinke
noone at nowhere.com
Sat Sep 14 11:53:14 UTC 2024
On Saturday, 14 September 2024 at 11:20:26 UTC, user1234 wrote:
> I'm confused, not sure if it's a codegen bug but as you can
> observe here https://godbolt.org/z/PKn4Tnzff, it seems that
> since LDC 1.38, a SHR is generated but 1.37 previously it was a
> ROL (and not ROR either).
What can be seen is that optimized core.bitop.ror does use the
ror instruction, but the comparison with inlined ror can
apparently be transformed by the optimizer, and LLVM 18 (LDC
v1.38+) chooses a different transformation with movzx+shr instead
of LLVM 17's rol.
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