Why there is too many uneccessary casts?

Adam D. Ruppe destructionator at gmail.com
Tue Jun 11 18:35:44 PDT 2013


On Wednesday, 12 June 2013 at 00:58:17 UTC, Ali Çehreli wrote:
> The CPU would have to have special registers to do those 
> operations in. (I am under the impression that x86 does not 
> have any arithmetic registers for types narrower than int.)

It does, for 8, 16, 32, and 64 bits. Here's how 8 and 16 bit 
arithmetic looks:

import std.stdio;

void main() {
	ubyte a;
	ubyte h;
	// byte addition and subtraction
	// demoing cast(ubyte) 255 + cast(ubyte) 10 - cast(ubyte) 5
	asm {
		mov AL, 255;
		add AL, 10;
		sub AL, 5;
		mov [a], AL;
		mov [h], AH;
	}
	writefln("AL: %d  AH: %d", a, h);

	// byte multiplication, answer goes into a 16 bit register, but 
we could truncate it too
	// demoing cast(ubyte) 50 * cast(ubyte) 10
	ushort response;
	asm {
		mov AL, 50;
		mov BL, 10;
		imul BL;
		mov [response], AX; // the full answer
		mov [a], AL; // explicit cast to ubyte
	}

	writeln("50 * 10 = ", response, " casted to ubyte gives ", a);

	// division works the other way
	// demoing cast(ubyte) 252 / cast(ubyte) 5
	ubyte quotient, remainder;
	asm {
		mov AH, 0; // clear the high byte because divide uses both, but 
we're explicitly talking bytes here so we can just zero it
		mov AL, 252; // our byte value
		mov BL, 5; // another byte
		idiv BL;
		mov [quotient], AL;
		mov [remainder], AH;
	}

	writeln("252 / 50 = ", quotient, " remainder ", remainder);



	// the x86 can do 16 bits as well

	ushort s1, s2;
	asm {
		mov AX, 65534;
		add AX, 4;
		mov [s1], AX;
	}
	writeln("16 bit add, expecting overflow: ", s1);

	asm {
		mov AX, 1000;
		mov BX, 1000;
		mul BX; // AX * BX

		// the answer is 32 bits here, just like 8 bit multiply put the 
answer in 16 bits
		mov [s1], DX; // the high word
		mov [s2], AX; // the low word
	}

	writeln("16 bit mul casted to ushort: ", s2, " full answer: ", 
s1 << 16 | s2);

	// you get the idea by now.....
}


32 bit and 64 bit follow the same pattern, with ever growing 
registers. This code runs with both -m32 and -m64 (and it would 
work as 16 bit if D had that option... dmc does if you actually 
want to try it!)


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