mov reg,0 vs xor reg,reg in core.atomic ?

[darat via Digitalmars-d-learn]

On Monday, 11 April 2016 at 05:45:17 UTC, Ali Çehreli wrote:
> On 04/10/2016 04:00 AM, darat wrote:
>> Is there a particular reason explaining why mov reg,0 is used 
>> and not
>> xor reg,reg ?
> https://www.google.com/search?q=mov+0+versus+xor+cycles&ie=utf-8&oe=utf-8#q=mov+0+versus+xor+cpu+cycle
>
> Ali

I've read them all before posting here. Nothing answers the 
question. The only clue is maybe that xor modifies the EFLAG 
register, but since inline asm is not inlined (there's always a 
CALL) I'm not 100% sure this is relevant.