"The total size of a static array cannot exceed 16Mb."

[Vladimir Panteleev]

On Wed, 03 Oct 2007 02:31:47 +0300, BCS <ao at pathlink.com> wrote:

> I think we are referring to the same thing, but counting different parts
> of it. What I'm counting is the times that a load is done from an address
> that is not an inline value, but comes from a register.

OK, so in the first array example that makes one load (only the value we need), and in the second - two (one to get the address of the array data, and another to get the value).

>> readValue proc near
>> mov     eax, ds:bigArr[eax*4]
>
> If I'm reading this correctly what is happening here is "load address (bigArr
> + eax*4)

No, that gets the value directly and puts it in eax. To get the address I would use the "lea" instruction instead of "mov" (which is useful if you want to read and then write to the address).

> unless IA32 has a special case op for that, your going to have to compute
> the address in another op and even if there is a special case, I rather suspect
> that it will be exactly as fast either way. Furthermore, if more than one
> detention is used you will have to do the computation in other ops no mater
> what.

I posted the disassembly listing of the D code I supplied, so this code works (there are no missing instructions).

>> retn
>> readValue endp
>
> BTW where did you get that ASM dump? I don't recognize the format.

The demo version of Interactive Disassembler[1]. It's quite useful for a Windows D programmer's arsenal, since it understands D symbolic information. (They're loaded mangled, so I "demangled" them manually.)

>> readValue proc near
>> mov     ecx, ds:bigArr
>> mov     eax, [ecx+eax*4]
>> retn
>> readValue endp
>> It gets worse if there are further nests, e.g. when using
>> multidimensional arrays.
>
> unless you are nesting dynamic arrays it's just math, not dereferences (i1
> + d1*i2 + d2*d1*i3 ...)

Yes, I meant dynamic arrays (or pointers, for the first "link")...

>> 3) rectangular static arrays are much faster when you want to access
>> it by column - you just add (width*element_size) to the pointer, and
>> go to the element on the next row
>
> this can be done with a dynamic array of static sized arrays.

Yeah. Forgot about those (again).

>> 4) when you want to access an address inside the element (you have an
>> array of structs), you must perform an addition after the
>> multiplication (I think it can be part of the instruction in the newer
>> instruction sets though) - while, when the array base address is
>> predetermined, you can just use base_address + element_offset as the
>> base address, then add index*element_size to that
>
> It looks like you are using a (constA + Constb * reg) address mode. I just
> look in the "Intel Architecture Software Developer's Manual" and didn't find
> any reference to it. Am I missing something? (I didn't actual look real hard)

ConstB must be a power of 2 - and I don't think I can find a link more easily than you (since I don't use any online - or any other, actually - reference). As WB mentioned in another reply, there's also a [reg1 + reg2*powerOfTwo + offset] addressing mode.

-- 
Best regards,
 Vladimir                          mailto:thecybershadow at gmail.com