Determing cache sizes -- request for testing

[Tomas Lindquist Olsen]

Vendor string:    GenuineIntel
Processor string: Intel(R) Celeron(R) CPU          550  @ 2.00GHz
Signature:        Family=6 Model=22 Stepping=1
Features:         MMX FXSR SSE SSE2 SSE3 SSSE3 AMD64
Multithreading:   1 threads / 1 cores

Family=6 Model=6 Stepping=1
Data caches:
Level 1 size=32K, ways=8 linesize=64
Level 2 size=1024K, ways=4 linesize=64
Level 3 size=4194303K, ways=1 linesize=64