Determing cache sizes -- request for testing
TomD
t_demmer at nospam.web.de
Wed Sep 10 05:34:13 PDT 2008
Vendor string: GenuineIntel
Processor string: Intel(R) Core(TM)2 CPU T5500 @ 1.66GHz
Signature: Family=6 Model=15 Stepping=2
Features: MMX FXSR SSE SSE2 SSE3 SSSE3 AMD64 HTT
Multithreading: 2 threads / 2 cores
Family=6 Model=F Stepping=2
Data caches:
Level 1 size=16K, ways=8 linesize=64
Level 2 size=1024K, ways=8 linesize=64
Level 3 size=4194303K, ways=1 linesize=64
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