SIMD support...

Russel Winder russel at russel.org.uk
Fri Jan 6 07:01:57 PST 2012


On Fri, 2012-01-06 at 16:35 +0200, Manu wrote:
[...]
> I don't see any issue with this. An array of vectors makes perfect sense,
> and I see no reason why arrays/slices/etc of hardware vectors should be any
> sort of problem.
> This particular expression should be just as efficient as if it were an
> array of flat floats, especially if the compiler unrolls it.
> 
> D's array/slice syntax is something I'm very excited about actually in
> conjunction with hardware vectors. I could do some really elegant geometry
> processing with slices from vertex streams.

Excuse me for jumping in part way through, apologies if I have the
"wrong end of the stick".

As I understand it currently the debate to date has effectively revolved
around how to have first class support in D for the SSE (vectorizing)
capability of the x86 architecture.  This immediately raises the
questions in my mind:

1.  Should x86 specific things be reified in the D language.  Given that
ARM and other architectures are increasingly more important than x86, D
should not tie itself to x86.

2.  Is there a way of doing something in D so that GPGPU can be
described?

Currently GPGPU is dominated by C and C++ using CUDA (for NVIDIA
addicts) or OpenCL (for Apple addicts and others).  It would be good if
D could just take over this market by being able to manage GPU kernels
easily.  The risk is that PyCUDA and PyOpenCL beat D to market
leadership.
 
-- 
Russel.
=============================================================================
Dr Russel Winder      t: +44 20 7585 2200   voip: sip:russel.winder at ekiga.net
41 Buckmaster Road    m: +44 7770 465 077   xmpp: russel at russel.org.uk
London SW11 1EN, UK   w: www.russel.org.uk  skype: russel_winder
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