GPGPUs

[deadalnix]

On Friday, 16 August 2013 at 19:53:44 UTC, Atash wrote:
> I'm iffy on the assumption that the future holds unified memory 
> for heterogeneous devices. Even relatively recent products such 
> as the Intel Xeon Phi have totally separate memory. I'm not 
> aware of any general-computation-oriented products that don't 
> have separate memory.
>

Many laptop and mobile devices (they have it in the hardware, but 
the API don't permit to make use of it most of the time), next 
gen consoles (PS4, Xbox one).

nVidia is pushing against it, AMD/ATI is pushing for it, and they 
are right on that one.

> I'm also of the opinion that as long as people want to have 
> devices that can scale in size, there will be modular devices. 
> Because they're modular, there's some sort of a spacing between 
> them and the machine, ex. PCIe (and, somewhat importantly, a 
> physical distance between the added device and the CPU-stuff). 
> Because of that, they're likely to have their own memory. 
> Therefore, I'm personally not willing to bank on anything short 
> of targeting the least common denominator here (non-uniform 
> access memory) specifically because it looks like a necessity 
> for scaling a physical collection of heterogeneous devices up 
> in size, which in turn I *think* is a necessity for people 
> trying to deal with growing data sets in the real world.
>

You can have 2 sockets on the motherboard.

> Annnnnnnnnnnndddddd because heterogeneous compute devices 
> aren't *just* GPUs (ex. Intel Xeon Phi), I'd strongly suggest 
> picking a more general name, like 'accelerators' or 'apu' 
> (except AMD totally ran away with that acronym in marketing and 
> I sort of hate them for it) or 
> '<something-I-can't-think-of-because-words-are-hard>'.
>
> That said, I'm no expert, so go ahead and rip 'mah opinions 
> apart. :-D

Unified memory have too much benefice for it to be ignored. The 
open questions are about cache coherency, direct communication 
between chips, identical performances through the address space, 
and so on. But the unified memory will remains. Even when memory 
is physically separated, you'll see an unified memory model 
emerge, with disparate performances depending on address space.