popcnt usage
Marco Leise
Marco.Leise at gmx.de
Mon Dec 23 21:23:36 PST 2013
Am Mon, 23 Dec 2013 23:46:11 +0000
schrieb Iain Buclaw <ibuclaw at gdcproject.org>:
> On 23 December 2013 16:47, Todd VanderVeen <tdvanderveen at gmail.com> wrote:
> > First, let me say thanks for the addition of the popcnt inline assembler
> > opcode. I had placed a project on hold until it was available. I look
> > forward to using D again.
> >
> > I determined this instruction was available after some experimentation as
> > its not documented on the inline assembler page.
> >
> > uint popcnt (ulong bits) {
> > asm {
> > mov RAX, bits ;
> > popcnt RAX, RAX ;
> > }
> > }
> >
> > Mention is made in the documentation of SSE4.2 support but I understand
> > popcnt and lzcnt aren't really considered part of this instruction set as
> > they aren't register based. If I were to submit a pull request to address
> > the documentation, how would you prefer this is represented, simply as
> > additions to the opcode table or annotated that they were implemented
> > alongside SSE4.2? Both?
> >
> > A second concern is whether it is possible to determine the availability of
> > this instruction at compile time. I want to do something like the following
> > in a custom popcnt method:
> >
> > version(X86_64) {
> > static if (hasPopcnt()) {
> > asm {
> > ... performant assembly version
> > }
> > } else {
> > ... slower procedural version
> > }
> > }
> >
>
> There's no way to do this at compile time, other than assume that
> D_InlineAsm_X86_64 imples popcnt, or do a runtime check to determine
> the correct path to take.
You _could_ export the the target CPU as some built-in enum.
Like in the old days where it resulted in Pentium Pro and K6
builds.
--
Marco
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