ARM bare-metal programming in D (cont) - volatile

[John Colvin]

On Thursday, 24 October 2013 at 09:43:51 UTC, Iain Buclaw wrote:
>>> 'shared' guarantees that all reads and writes specified in 
>>> source code
>>> happen in the exact order specified with no omissions

> If you require memory barriers to access share data, that is 
> what
> 'synchronized' and core.atomic is for.  There is *no* implicit 
> locks
> occurring when accessing the data.

If there are no memory barriers, then there is no guarantee* of 
ordering of reads or writes. Sure, the compiler can promise not 
to rearrange them, but the CPU is a different matter.

*dependant on CPU architecture of course. e.g. IIRC the intel 
atom never reorders anything.