{OT} Youtube Video: newCTFE: Starting to write the x86 JIT

[Ola Fosheim Grøstad via Digitalmars-d]

On Tuesday, 25 April 2017 at 16:16:43 UTC, Patrick Schluter wrote:
> It's already the case. Intel and AMD (especially in Ryzen) 
> strongly discourage the use of prefetch instructions since at 
> least Core2 and Athlon64. The icache cost rarely pays off and 
> very often breaks the auto-prefetcher algorithms by spoiling 
> memory bandwidth.

I think it just has to be done on a case-by-case basis. But if 
one doesn't target a specific set of CPUs and a specific 
predictable access pattern (like visiting every 4th cacheline) 
then one probably shouldn't do it.

There are also so many different types to choose from: 
prefetch-for-write, prefetch-for-one-time-use, 
prefetch-to-cache-level2, etc... Hard to get that right for a 
small-scale JIT without knowledge of the the algorithm or the 
dataset.