Replacing C's memcpy with a D implementation
Walter Bright
newshound2 at digitalmars.com
Mon Jun 11 00:01:46 UTC 2018
On 6/10/2018 4:39 PM, David Nadlinger wrote:
> That's not entirely true. Intel started optimising some of the REP string
> instructions again on Ivy Bridge and above. There is a CPUID bit to indicate
> that (ERMS?); I'm sure the Optimization Manual has further details. From what I
> remember, `rep movsb` is supposed to beat an AVX loop on most recent Intel
> µarchs if the destination is aligned and the data is longer than a few cache
The drama of which instruction mix is faster on which CPU never abates!
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