Andrei Alexandrescu needs to read this
Mark
smarksc at gmail.com
Sun Oct 27 20:11:38 UTC 2019
On Wednesday, 23 October 2019 at 23:51:16 UTC, H. S. Teoh wrote:
> Another recent development is the occasional divergence of
> performance characteristics of CPUs across members of the same
> family, i.e., the same instruction on two different CPU models
> may perform quite differently. Meaning that this sort of
> low-level optimization is really best left to the optimizer to
> optimize for the actual target CPU, rather than to choose a
> fixed series of instructions in an asm block that may perform
> poorly on some CPUs. (This is also where JIT compilation can
> win over static compilation, if you ship a generic binary that
> isn't specifically targeted for the customer's CPU model.)
>
> T
Would it be reasonable to say that modern CPUs basically do JIT
compilation of assembly instructions? Or at the very least, that
they have a built-in "runtime" that is responsible for all that
ILP magic - cache policy algorithms, MESI protocol, the branch
predictor and so on. If so, you could argue that the Itanium was
an attempt to avoid this "runtime" and transfer all these
responsibilities to the compiler and/or programmer. Not a very
successful one, apparently.
It is also a bit analogous to the GC vs. deterministic manual
memory management debate.
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