[dmd-concurrency] shared arrays

[Brad Roberts]

On Fri, 15 Jan 2010, Sean Kelly wrote:

> On Jan 14, 2010, at 7:20 PM, Andrei Alexandrescu wrote:
> > 
> > Speaking of which: is it reasonable to assume that all 32-bit modern architectures have a 64-bit atomic assign? How about 64-bit atomic CAS?
> 
> For x86, I think this is reasonable today.  I recall there being an 
> issue a while back with some CPUs (I can't recall if they were from 
> Intel or AMD) that were missing this instruction, but I think those days 
> are gone.  Here's a page about Windows and 8 byte CAS I ran across that 
> seems relevant:
> 
> http://www.geoffchappell.com/viewer.htm?doc=studies/windows/km/cpu/cx8.htm

I'd have to go find the, but for my work environment, there's generations 
of processors still in active use that don't support 2x32bit atomic word 
stores.  Those processors are probably about 5 years old at this point 
(again, from memory -- certainly less than 10).


I don't think making the assumption that they're always available is 
viable.  We're trying to run on all 32 bit platforms, right?

Later,
Brad