[dmd-concurrency] shared arrays

[Robert Jacques]

On Wed, 27 Jan 2010 21:33:42 -0500, Andrei Alexandrescu  
<andrei at erdani.com> wrote:
> Robert Jacques wrote:
>> So, my read on this is the given all 64-bit x86 CPUs support SSE2,  
>> atomic reads/writes can be done using 128-bit SSE memory ops on aligned  
>> data. So all that's needed is align(16) support in DMD (align(8) would  
>> also be appreciated)
>
> I've read about 128-bit SSE operations. I'm not sure to what extent we  
> could rely on them being there.

While SSE2 is not standard on x86 platforms, it is on x86-64, so you can  
assume it's there.