[phobos] byte alignment for arrays

Jason Spencer spencer8 at sbcglobal.net
Mon Jun 28 12:00:10 PDT 2010


I would recommend changing it to 16-byte aligned.  Lots of SSE instructions won't work or won't work efficiently at 8-byte aligned addresses.  Even without SSE, this makes array access more cache-friendly, and is likely to help.  If we're only talking about arrays larger than page-size, then it's not too much memory overhead.

For less-than-page-sized arrays (or performance-tight code if you DON'T make the change), you'd have to use something like std.c.stdlib or std.<system> _aligned_alloc() to get around this.  Might be worth verifying this is actually available and works (maybe a unit test?. )

Jason



----- Original Message ----
> From: Steve Schveighoffer <schveiguy at yahoo.com>
> To: Phobos <phobos at puremagic.com>
> Sent: Mon, June 28, 2010 11:36:25 AM
> Subject: [phobos] byte alignment for arrays
> 
> Recently, this bug has surfaced: 
> http://d.puremagic.com/issues/show_bug.cgi?id=4400

In a nutshell, 
> sometimes the byte alignment of arrays is 8 bytes instead 16 bytes.

This 
> was caused by my array append patch, because in large arrays, I store the length 
> at the front of the array.  With some queries before I created my patch, I 
> was told that 8 byte alignment was fine.  However, the alignment is easy to 
> change since it's a couple specific functions that determine the padding and 
> alignment.  So changing to 16 bytes is not an issue technically, and 
> functionally, this is only on PAGE sized arrays and larger, so 16 bytes vs. 8 
> bytes isn't likely to cause problems.

Bearophile's main argument stems 
> from this.  I am not a processor or assembly expert, so I have no idea 
> about this at all:

-----------------
The 16 bytes alignment was 
> introduced because instructions like the SSE2 movapd
need 16 byte 
> alignment:
http://en.wikipedia.org/wiki/MOVAPD

I have recently used 
> it 
> here:
http://www.digitalmars.com/webnews/newsgroups.php?art_group=digitalmars.D&article_id=112670

> 
And some other SSE* instructions work with 8 byte alignment too, but they 
> are
slower (future CPUs can remove such alignment requirements, some of it 
> has
being removed already, so in that future the GC can go back giving 8 
> bytes
aligned memory).
-----------------

So should I change 
> it?

-Steve



      
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